• Instruction Fetches from Peripheral Memory Space
    Is it possible to use the MPU to configure the Peripheral Memory Space as Execute? It looks possible via the MPU_RBAR.XN bit. If this is the case, is it fair to say that TrustZone aware select gates...
  • Instruction Fetches from Peripheral Memory Space
    Is it possible to use the MPU to configure the Peripheral Memory Space as Execute? It looks possible via the MPU_RBAR.XN bit. If this is the case, is it fair to say that TrustZone aware select gates...
  • Questions About Mali Job Slot and Address Space
    Hello there,     I'am developing a job schedule policy for Mali T628. But I am confused about Jos Slot and Address Space: 1. What does Job Slot mean? What is the relationship between job slot and shader...
  • Questions About Mali Job Slot and Address Space
    Hello there,     I'am developing a job schedule policy for Mali T628. But I am confused about Jos Slot and Address Space: 1. What does Job Slot mean? What is the relationship between job slot and shader...
  • Questions about Barrier instructions & ACE Barrier transactions
    1. How barrier instructions like `dmb ishld` and `ldar/stlr` translate to ACE barrier transactions? I am curious about how barrier instructions which will only affect specific types of memory operations...