Cortex-A8 - accessing banked registers from monitor mode

Note: This was originally posted on 20th March 2012 at http://forums.arm.com Hi Group, I am working on a Cortex A-8 Processor (ARMv7-a architecture). I am in the monitor mode and trying to access SP of...
Cortex-A8 - accessing banked registers from monitor mode

Note: This was originally posted on 20th March 2012 at http://forums.arm.com Hi Group, I am working on a Cortex A-8 Processor (ARMv7-a architecture). I am in the monitor mode and trying to access SP of...
Not able to erase FLASH BANK A in lpc1837

Hi, I am using LPC1837, I am using Flash Erase Page using IAP commands as follows /* Erase page */ IAP.cmd = CMD_ERASE_PAGE; IAP.par[0] = u4l_flash_start_addr; IAP.par[1] = u4l_flash_end_addr;...
Not able to erase FLASH BANK A in lpc1837

Hi, I am using LPC1837, I am using Flash Erase Page using IAP commands as follows /* Erase page */ IAP.cmd = CMD_ERASE_PAGE; IAP.par[0] = u4l_flash_start_addr; IAP.par[1] = u4l_flash_end_addr;...
Not able to put Break Point in Debug mode

Hi, Once we have entered into the debug mode, We are not able to put the break point, thanking you Harish G