Is First-level table skippable? (VMSA)

Hi forks. I am a newbie engineer for arm-processor and I have a question about VMSAv7-32. According to ARMv8 architecture manual, page 3592: arm processor can skip first level table if a first level table...
Is First-level table skippable? (VMSA)

Hi forks. I am a newbie engineer for arm-processor and I have a question about VMSAv7-32. According to ARMv8 architecture manual, page 3592: arm processor can skip first level table if a first level table...
Minimum MMU table size on ARMv8 to map 4GB memory space, in AArch64 mode

On ARMv7 Cortex-A8/9/7, to map 4GB memory space, the minimum MMU table size is 16 KB(section mapping). Any possible to map 4 GB memory space with 16 KB MMU table, on ARMv8, AArch64 mode?
Minimum MMU table size on ARMv8 to map 4GB memory space, in AArch64 mode

On ARMv7 Cortex-A8/9/7, to map 4GB memory space, the minimum MMU table size is 16 KB(section mapping). Any possible to map 4 GB memory space with 16 KB MMU table, on ARMv8, AArch64 mode?
Aarch64 MMU tool

I just like to share a heavily reworked tool to generate (bare metal) MMU tables for Aarch64: https://github.com/42Bastian/arm64-pgtable-tool It is based on this one: https://github.com/ashwio/arm64...