Cortex-A32 aarch32, change from HYP mode to SVC mode fail

Hi, Base info: core: Cortex-A32 before cpsr: 0x600001da (HYP mode) I want to use below core to change to SVC mode but fail, after below code run, I can jump to 'continueBoot' , But the CPSR...
Problem switching from EL3 to non-secure EL1

Cortex-A35 processor, AArch64 mode. Before setting up MMU and GIC, I'm trying to go from EL3 to non-secure EL1: msr VTTBR_EL2, xzr mov x0, SCR_EL3.RES1 or SCR_EL3.NS or SCR_EL3.RW or SCR_EL3.ST ...
Problem switching from EL3 to non-secure EL1

Cortex-A35 processor, AArch64 mode. Before setting up MMU and GIC, I'm trying to go from EL3 to non-secure EL1: msr VTTBR_EL2, xzr mov x0, SCR_EL3.RES1 or SCR_EL3.NS or SCR_EL3.RW or SCR_EL3.ST ...
How to enter USR mode from SVC mode?

Note: This was originally posted on 1st August 2011 at http://forums.arm.com I changed CPSR to 0x1D0(which means USR mode )in SVC mode in cortex-a8 platform(freescale imx51), but a perfetch_error occured...
How to enter USR mode from SVC mode?

Note: This was originally posted on 1st August 2011 at http://forums.arm.com I changed CPSR to 0x1D0(which means USR mode )in SVC mode in cortex-a8 platform(freescale imx51), but a perfetch_error occured...