The cortex-A7's pipeline support dual-issue, so I want to ask what's the dual-issue mean?

The cortex-A7's pipeline support dual-issue, so I want to ask what's the dual-issue mean? I find some answers say that dual-issue means that the cortex-A7 can issue two instructions per clock. But in...
The cortex-A7's pipeline support dual-issue, so I want to ask what's the dual-issue mean?

The cortex-A7's pipeline support dual-issue, so I want to ask what's the dual-issue mean? I find some answers say that dual-issue means that the cortex-A7 can issue two instructions per clock. But in...
LPC1769 issue

Hello! I have a board working with LPC2368 uC, I talked to some NXP representative and he told me that LPC1769 were pin compatible. The problem is, the board works fine with LPC2368, but when...
inteerworking issue

Hello, I am working with the ADUC7020 target and working with the gcc compiler 3.3.1. I am using a project with assembler and C files. I have on eassembler file definign a function init And...
ID issue

If two AXI masters are sending transactions with same ID, how to send response correctly to the respective masters