Bypassing Interrupt Vector Table addres

Hi, i have written a code in C language,in which i used two ISRs for timer0 and timer2. How can i avoid overlapping of addresses of ISRs and main, like we have LJMP instruction in assembly language....
Bypassing Interrupt Vector Table addres

Hi, i have written a code in C language,in which i used two ISRs for timer0 and timer2. How can i avoid overlapping of addresses of ISRs and main, like we have LJMP instruction in assembly language....
Enbaling hardware linkage on IAR workbench

Hi I am working with Nordic nRF52832, which contains Cortex™-M4F CPU with FPU unit. In order to get the best performace I want to enbale hardware linkage. How do I do it? How can I make sure that hardware...
Enbaling hardware linkage on IAR workbench

Hi I am working with Nordic nRF52832, which contains Cortex™-M4F CPU with FPU unit. In order to get the best performace I want to enbale hardware linkage. How do I do it? How can I make sure that hardware...
Weak linkage doesn't work as expected

Note: This was originally posted on 14th May 2010 at http://forums.arm.com I am using the weak linkage feature of the Real-View Development suite. It appears that a function that is declared as weak...