changing Clock and PLL setting

Hello.... I was using keil 5 that I installed it last year.This year, after refreshing my windows, I had to install keil 5 again, but this time, I have a problem with new version of system_stm32f4xx...
changing Clock and PLL setting

Hello.... I was using keil 5 that I installed it last year.This year, after refreshing my windows, I had to install keil 5 again, but this time, I have a problem with new version of system_stm32f4xx...
pll and clock setup issue on mcbstm32c

hey,, >>i want to use usart-2 peripheral on MCBSTM32C and i realised the baud rate set was incorrect, (inspite of right calculations) which was because of the incorrect plck-1 (=112.5Mhz, which should...
pll and clock setup issue on mcbstm32c

hey,, >>i want to use usart-2 peripheral on MCBSTM32C and i realised the baud rate set was incorrect, (inspite of right calculations) which was because of the incorrect plck-1 (=112.5Mhz, which should...
ARM Cortex A9 - Enabling/Disabling the Caches

Hello, I'm developing a custom bootloader for NXP i.MX6 DualLite (ARM Cortex A9). In this bootloader, I need to initialize ~50 MB of RAM to Zeros, this part executes really fast after enabling Caches...