COrtex M7 cache hit rate measurement

Hello community, I have a Cortex M7 based product, and I want to measure the cache hit rate in different applications.compared to the cortex R5 the M7 does not embed a PMU. Do you have some idea on...
COrtex M7 cache hit rate measurement

Hello community, I have a Cortex M7 based product, and I want to measure the cache hit rate in different applications.compared to the cortex R5 the M7 does not embed a PMU. Do you have some idea on...
MALI T760MP4 L2 cache hit ratio low (64%)

Hi all: I used gator and streamline to check the MALI T760MP4 L2 cache hit ratio. But the performance is bad. The read hit ratio is about 64%. Is Mali L2 cache a tile-based cache ? If so, how to optimize...
MALI T760MP4 L2 cache hit ratio low (64%)

Hi all: I used gator and streamline to check the MALI T760MP4 L2 cache hit ratio. But the performance is bad. The read hit ratio is about 64%. Is Mali L2 cache a tile-based cache ? If so, how to optimize...
Calculating L1 hit latency and L2 hit latency

Note: This was originally posted on 16th January 2012 at http://forums.arm.com All, I am new here. I was interested in measuring the L1 hit latency for A15/A9. Which signals do I need to probe inside...