Is it possible to generate position independent code for aarch64 target?

Seems like all related armclang options (-fpic, -fropi, -frwpi) are not supported in aarch64 state, so is it possible to generate position independent code for aarch64 target? Thanks -Oscar
Is it possible to generate position independent code for aarch64 target?

Seems like all related armclang options (-fpic, -fropi, -frwpi) are not supported in aarch64 state, so is it possible to generate position independent code for aarch64 target? Thanks -Oscar
how keil load position position independent code?

Hi: I'm try debug position independent code in Keil, but found the keil Load command did not support add base address. Question: How to load position independent code into RAM? code like flash...
how keil load position position independent code?

Hi: I'm try debug position independent code in Keil, but found the keil Load command did not support add base address. Question: How to load position independent code into RAM? code like flash...
position independent independent - libc_nano

Hi, I am building a c++ application on an nxp imx rt 1024 which has an arm cortex-m7 cpu. We have the strong need for OTA (over the air update) thus I created a customer bootloader, and the actual firmware...