cortex A7 interrupt handling.

We are working on the STM32MP157 device . We had written the bare metal drivers for the USART its working fine . We struct at interrupt handling . We are able to serve the software interrupt when we going...
cortex A7 interrupt handling.

We are working on the STM32MP157 device . We had written the bare metal drivers for the USART its working fine . We struct at interrupt handling . We are able to serve the software interrupt when we going...
CORTEX-A processor interrupt handling

Since I am currently reading lot of ARM documents to understand the architecture as a whole, I request you to mention as to what happens in case of CORTEX-A processor in the nested interrupt handler implementation...
CORTEX-A processor interrupt handling

Since I am currently reading lot of ARM documents to understand the architecture as a whole, I request you to mention as to what happens in case of CORTEX-A processor in the nested interrupt handler implementation...
ARM interrupt handling

I have following question: I want to know in ARM7 if inside FIQ isr I put a SWI instruction then whether first the FIQ will complete and then SWI exception will be taken or SWI exception will get...