MPIDR and affinity

Hi there, I am learning AARCH64 and would like to know about the mpidr_el1 register and affinity levels. I have read the relevant sections in the programmer's guide but I am just not able to understand...
MPIDR and affinity

Hi there, I am learning AARCH64 and would like to know about the mpidr_el1 register and affinity levels. I have read the relevant sections in the programmer's guide but I am just not able to understand...
CPUACTLR_EL1 and S3_1_C15_C2_0 in Cortex-A57 TRM

hi, experts: In Cortex-A57 TRM chapter 4.3.66 : It defines CPUACTLR_EL1 register, but this register name is not CPUACTLR_EL1. Its name is S3_1_C15_C2_0. Why? best wishes, hi
CPUACTLR_EL1 and S3_1_C15_C2_0 in Cortex-A57 TRM

hi, experts: In Cortex-A57 TRM chapter 4.3.66 : It defines CPUACTLR_EL1 register, but this register name is not CPUACTLR_EL1. Its name is S3_1_C15_C2_0. Why? best wishes, hi
Cortex-M3 r2p1 TRM Document CPUID.PARTNO is wrong?

ARM Cortex-M3 Processor Technical Reference Manual Revision r2p1 https://developer.arm.com/documentation/100165/0201/System-Control/CPUID-Base-Register--CPUID [15:4] PARTNO Indicates part...