Instruction Cache Throttle PMU event

I am looking for information on the Instruction Cache Throttle event on Cortex-A53. The docs just say "Instruction Cache Throttle occurred". Can anyone elaborate or point me to a more thorough explanation...
Why I can't find the performance monitoring event for all Instructions count? How to get instructions event for my ARMV7 Cortex-A9 by PMU?

Can anyone help?
Why I can't find the performance monitoring event for all Instructions count? How to get instructions event for my ARMV7 Cortex-A9 by PMU?

Can anyone help?
ARM PMU access DRAM Event

Hi, accorting to the reference manual of cortex A7 https://static.docs.arm.com/ddi0464/f/DDI0464.pdf pagina 243, what event number i neet to select to count all the DRAM access (read / write)?
ARM PMU access DRAM Event

Hi, accorting to the reference manual of cortex A7 https://static.docs.arm.com/ddi0464/f/DDI0464.pdf pagina 243, what event number i neet to select to count all the DRAM access (read / write)?