not able to do code banking in monitor mode

Problem: Unable to execute the program with banking. The operating system i am using is windows 95, my target hardware has the following settings a)common area - 1400 to 7fff (VNM) b)banked area...
not able to do code banking in monitor mode

Problem: Unable to execute the program with banking. The operating system i am using is windows 95, my target hardware has the following settings a)common area - 1400 to 7fff (VNM) b)banked area...
Why only first half of register bank is accessible in VFP's S0-31 register bank?

Hello, I am working on an ALU Supervisor with armv7-M. Everything in documentation seem to say if cp10 and cp11 are activated, s0-s31 are accessible. Everything works fine with s0-s15 Though when...
Why only half of register bank is accessible in VFP's S0-31 view of register bank?

I am optimizing a simple l2-distance calculation program target at Cortex-A7. Initially, i choose to unroll the calculation loop like below: ```c void l2_naive_f32(float *mat, uint32_t m, uint32_t n...
Why only half of register bank is accessible in VFP's S0-31 view of register bank?

I am optimizing a simple l2-distance calculation program target at Cortex-A7. Initially, i choose to unroll the calculation loop like below: ```c void l2_naive_f32(float *mat, uint32_t m, uint32_t n...