A72 ACP deadlock

1. GDMA writes to the ACP port and is backpressed, resulting in GDMA reads being backpressed. The memory channel on the GDMA read chip and the memory channel on the A72 read chip are the same channel...
Cortex-A72 ACP deadlock issue

Can you share any examples of write access Cortex-A72 ACP port deadlocks? What are the limitations of using ACP ports at the system level, except for those mentioned in the A72 TRM manual
Cortex A9 - ACP slave outstanding read requests

Hello everyone! I searched through the docs of the Cortex A9, but I can't find anywhere this information. I saw that for the cortex A53 the ACP slave is capable of handling 4 outstanding requests...
Cortex A9 - ACP slave outstanding read requests

Hello everyone! I searched through the docs of the Cortex A9, but I can't find anywhere this information. I saw that for the cortex A53 the ACP slave is capable of handling 4 outstanding requests...
Why is there an ACP interface for many ARM processors?

Dear sirs, I read ACE specification and ARM processor documents for ACP explanation. I always have some questions about ACP. As soon as you know, ACP exists in SCU for data coherency. Q1: The document...