How to enter USR mode from SVC mode?

Note: This was originally posted on 1st August 2011 at http://forums.arm.com I changed CPSR to 0x1D0(which means USR mode )in SVC mode in cortex-a8 platform(freescale imx51), but a perfetch_error occured...
How to enter USR mode from SVC mode?

Note: This was originally posted on 1st August 2011 at http://forums.arm.com I changed CPSR to 0x1D0(which means USR mode )in SVC mode in cortex-a8 platform(freescale imx51), but a perfetch_error occured...
debug command-execution stopped in USR mode

Hi, what does the command mean " wait step Execution stopped in USR mode" I am using DS-5 Debug Eclipse Platform to debug .c file. my target is connected to ULINK Pro ,and the connections is...
debug command-execution stopped in USR mode

Hi, what does the command mean " wait step Execution stopped in USR mode" I am using DS-5 Debug Eclipse Platform to debug .c file. my target is connected to ULINK Pro ,and the connections is...
ARMv8 why does not use Current Program Status Register(CPSR) ，

Why separate and independent visits AArch64 does not have a direct equivalent of the ARMv7 Current Program Status Register (CPSR). In AArch64, the components of the traditional CPSR are supplied as...