ARM PMU - Event 0x56 - No instructions for issue (A8)

Note: This was originally posted on 30th October 2012 at http://forums.arm.com [font=Arial][size=2]I am using peemuperf ( https://github.com/prabindh/peemuperf/blob/master/README.md ) to get various cache...
ARM PMU - Event 0x56 - No instructions for issue (A8)

Note: This was originally posted on 30th October 2012 at http://forums.arm.com [font=Arial][size=2]I am using peemuperf ( https://github.com/prabindh/peemuperf/blob/master/README.md ) to get various cache...
Instruction Cache Throttle PMU event

I am looking for information on the Instruction Cache Throttle event on Cortex-A53. The docs just say "Instruction Cache Throttle occurred". Can anyone elaborate or point me to a more thorough explanation...
where can I find the detailed explanation of ARM PMU events?

Two questions: 1. Where can I find the detailed explanation of ARM PMU events? 2. How to know the stall cycles for e.g. icache miss etc.? Thanks.
where can I find the detailed explanation of ARM PMU events?

Two questions: 1. Where can I find the detailed explanation of ARM PMU events? 2. How to know the stall cycles for e.g. icache miss etc.? Thanks.