CMSIS KEIL RTOS - Mail queue vs Message queue

Dear all, I am using Keil Microvision IDE v5.16 and CMSIS Keil RTX RTOS. Our microcontroller is STM32F4xx. In the CMSIS RTOS API, message queue and mail queue inter-thread communication mechanisms...
CMSIS KEIL RTOS - Mail queue vs Message queue

Dear all, I am using Keil Microvision IDE v5.16 and CMSIS Keil RTX RTOS. Our microcontroller is STM32F4xx. In the CMSIS RTOS API, message queue and mail queue inter-thread communication mechanisms...
How many interruptions the pendent queue supports?

The queue for the processors interrupt context-m supports how many pending interruptions? Complementing please send me information where I can read more details about it. Thank you.
How many interruptions the pendent queue supports?

The queue for the processors interrupt context-m supports how many pending interruptions? Complementing please send me information where I can read more details about it. Thank you.
Invalidate queue

Hi Does a55 have an invalidate queue? Is it necessary that executing dmb before access shared variable in an SMP system?