A72 ACP deadlock

1. GDMA writes to the ACP port and is backpressed, resulting in GDMA reads being backpressed. The memory channel on the GDMA read chip and the memory channel on the A72 read chip are the same channel...
Cortex A9 - ACP slave outstanding read requests

Hello everyone! I searched through the docs of the Cortex A9, but I can't find anywhere this information. I saw that for the cortex A53 the ACP slave is capable of handling 4 outstanding requests...
Cortex A9 - ACP slave outstanding read requests

Hello everyone! I searched through the docs of the Cortex A9, but I can't find anywhere this information. I saw that for the cortex A53 the ACP slave is capable of handling 4 outstanding requests...
Deadlock accross multiple interconnects

Note: This was originally posted on 5th January 2011 at http://forums.arm.com For single AXI matrix, the interconnect can ensure that deadlock cannot occur via CDAS , however, could you please give me...
Signal deadlock in linting

Hello..I am doing linting for my RTL(AHB-SPMI) .I got Signal deadlock violation.Can anyone tell me what this deadlock signal is? and where it occurs?