Why does Cortex-R only support most two cores?

Why does Cortex-R only support most two cores?
Why does Cortex-R only support most two cores?

Why does Cortex-R only support most two cores?
Why thumb code can only access r0-r7?

Hi Sir, I want to know why thumb code can only access r0-r7, which described in ATPCS? Thanks and best regards, Wenchuan
Why thumb code can only access r0-r7?

Hi Sir, I want to know why thumb code can only access r0-r7, which described in ATPCS? Thanks and best regards, Wenchuan
Why does AHB or APB support only 16 slave devices?

I would like to know why only 16 slave device select lines are present in the AHB and APB bus architectures.