aarch64 MMU: inconsistency in ARMv8 ARM?

Hello, I try to reconfigure the MMU of an existing project. I try to do this by building upon an example of ARMv8 ARM. The example is the one in section K7.1.2, fig. K7-11, page 7293. I find the information...
aarch64 MMU: inconsistency in ARMv8 ARM?

Hello, I try to reconfigure the MMU of an existing project. I try to do this by building upon an example of ARMv8 ARM. The example is the one in section K7.1.2, fig. K7-11, page 7293. I find the information...
aarch64 MMU: skipping first/second level tables

Hi ! on armv7 [1] / aarch32 [2] MMU, when using Long descriptor, when the virtual space described by ttbr0 is small enough (1Gb here), the level 1 translation can be skipped, leaving only two levels...
aarch64 MMU: skipping first/second level tables

Hi ! on armv7 [1] / aarch32 [2] MMU, when using Long descriptor, when the virtual space described by ttbr0 is small enough (1Gb here), the level 1 translation can be skipped, leaving only two levels...
What is the difference between gcc-arm-aarch64-none-linux-gnu and gcc-arm-aarch64-none-elf tool-chains?

In download section for cross-compilers I see 2 options that seem viable for AArch64 cross-compiler under x86-64 Linux: gcc-arm-9.2-2019.12-x86_64-aarch64-none-elf.tar.xz and gcc-arm-9.2-2019.12...