Random behavior with SCTLR_EL1 reset values

Hi, I am working on Juno and I am using SCTLR_EL1 reset value based on A53 spec is = 0x00C50838 but If I look to ARMv8 spec it shows some reserved bits as 1 and considering that reset values = 0x30D50800...
Random behavior with SCTLR_EL1 reset values

Hi, I am working on Juno and I am using SCTLR_EL1 reset value based on A53 spec is = 0x00C50838 but If I look to ARMv8 spec it shows some reserved bits as 1 and considering that reset values = 0x30D50800...
Can I detect from which mode (EL1, EL0,...) SError interrupt was caused?

Dear all, As I know there are separate vectors to handle SError caused by EL0 and EL1. My queston is follow: Due to fact that SError is asynchronous, can I rely on fact that if cpu entered serror_el1_vector...
Can I detect from which mode (EL1, EL0,...) SError interrupt was caused?

Dear all, As I know there are separate vectors to handle SError caused by EL0 and EL1. My queston is follow: Due to fact that SError is asynchronous, can I rely on fact that if cpu entered serror_el1_vector...
How to access the system control register?

Hi all, I am trying to access the system control register in my ARM C program. The code (with heading 64 bit) I used is presented below. However I got the following error message during compilation. ...