STR instruction fails in Assembly

Hello everyone, I have written this piece of code that implements Bubble Sort in assembly. I declared an unsorted array with 10 elements with the DCD directive and then I have made register R0 indicate...
STR instruction fails in Assembly

Hello everyone, I have written this piece of code that implements Bubble Sort in assembly. I declared an unsorted array with 10 elements with the DCD directive and then I have made register R0 indicate...
Interrupt latency while STR/LDR in cortex-M3

Hi, What is the expected behaviour on M3 when issuing STR/LDR to some remote memory (AHB) and interrupt arrive? is the interrupt being delayed although this is normal memory and this command can re...
Interrupt latency while STR/LDR in cortex-M3

Hi, What is the expected behaviour on M3 when issuing STR/LDR to some remote memory (AHB) and interrupt arrive? is the interrupt being delayed although this is normal memory and this command can re...
Cortex M4 Unaligned access with STR single word access

Hi there, I am getting a hard fault for accessing an unaligned memory address with STR single word access on a cortex M4 processor (Infineon XMC4500 F100k1024). Cortex M4 manual says that: Unaligned support...