Arm64 Long Format Translation Table Walk

Hi all - I'm trying to understand stage 1 translation. Assuming that the translation is starting at level 2, how do you determine the number of page table entries in the level 2 table? The documnetation...
Arm64 Long Format Translation Table Walk

Hi all - I'm trying to understand stage 1 translation. Assuming that the translation is starting at level 2, how do you determine the number of page table entries in the level 2 table? The documnetation...
ARMv7-A: What is "Fault not on a stage 2 translation for a stage 1 translation table walk"?

Hi all, I'm trying to boot Linux on my hypervisor like environment. In booting process, unexpected hyper trap was occurred and became hyp mode. In hyp mode, the Hyp Syndrome Register (HSR) value is 0x93830006...
ARMv7-A: What is "Fault not on a stage 2 translation for a stage 1 translation table walk"?

Hi all, I'm trying to boot Linux on my hypervisor like environment. In booting process, unexpected hyper trap was occurred and became hyp mode. In hyp mode, the Hyp Syndrome Register (HSR) value is 0x93830006...
Arm a53: Populate TLB without table walk?

Hi, From a previous question I got that setting the EPDx bits from the TCR_ELx register to 1 will disable table walk. Good starting point. But, should I access the same memory location again, it won...