Does DSB(SY) guarantee Write-combined write to be flushed?

I found the following code sequence in our code. Can I know if the following DSB(SY) guarantees that register access (#3) will be executed after contents of #1 flushed to DDR memory? 1: write value...
Does DSB(SY) guarantee Write-combined write to be flushed?

I found the following code sequence in our code. Can I know if the following DSB(SY) guarantees that register access (#3) will be executed after contents of #1 flushed to DDR memory? 1: write value...
Behavior of DSB with early write acknowledgement device memory attribute

Suppose software does a write to device memory that allows early write acknowledgement, then executes a DSB instruction. *device_memory = 1; /* Suppose the memory type is Device-nGnRE */ asm volatile...
Behavior of DSB with early write acknowledgement device memory attribute

Suppose software does a write to device memory that allows early write acknowledgement, then executes a DSB instruction. *device_memory = 1; /* Suppose the memory type is Device-nGnRE */ asm volatile...
Cache attribute write back/write allocate for Cortex-M4

What is different between write back with write allocate and write with non write allocate on Cortex-M4.