why Foundation Model can not produce Address size fault，Translation fault， Access flag fault？

Hi， I want to produce an exception in Foundation Model to test my ARMV8 U-boot. But when I set AF bit to 0 in last level page table entry, and want to produce an Access Flag exception, it failed...
why Foundation Model can not produce Address size fault，Translation fault， Access flag fault？

Hi， I want to produce an exception in Foundation Model to test my ARMV8 U-boot. But when I set AF bit to 0 in last level page table entry, and want to produce an Access Flag exception, it failed...
Instruction Fault Generation

Hi Experts, Is there any sample code or way to generate the Instruction Fault by forcing the processor (Cortex R). For Example, I tried below but no updates in IFSR (instruction fault status register...
Instruction Fault Generation

Hi Experts, Is there any sample code or way to generate the Instruction Fault by forcing the processor (Cortex R). For Example, I tried below but no updates in IFSR (instruction fault status register...
Converting virtual address of Instruction fault address register to physical address in cotex A9

Content of IFAR=0xaa4e8ef0 IFSR=0x0000000d DFSR:0x00000000 DFAR:0x00004000 How to find Physical address form this?