Why does AHB or APB support only 16 slave devices?

I would like to know why only 16 slave device select lines are present in the AHB and APB bus architectures.
Why does AHB or APB support only 16 slave devices?

I would like to know why only 16 slave device select lines are present in the AHB and APB bus architectures.
Newbies on how to deal with more than 16 wait states in AHB lites?

Note: This was originally posted on 29th October 2011 at http://forums.arm.com I found an answer for more than 16 wait state problem: "[color=#222222][font=Verdana, sans-serif][size=2]For some slaves...
Newbies on how to deal with more than 16 wait states in AHB lites?

Note: This was originally posted on 29th October 2011 at http://forums.arm.com I found an answer for more than 16 wait state problem: "[color=#222222][font=Verdana, sans-serif][size=2]For some slaves...
Partial Word Access to Altera Avalon Memory-Mapped Slave

when I say partial word access, I mean 16-bit (two byte) or 8-bit (byte) read/write. Background: In one of our recent projects, Cyclone V SoC is used to replace 386 CPU in an existing product. I am responsible...