Using the whole Cortex-A L2 Cache without external memory

I'm thinking about using a cortex-a7 in "bare-metal" where I don't need much memory, so i'd like to avoid using external memory. The CPU boots from an external 4MBytes SPI NOR FLASH chip. It has 512 KBytes...
Using the whole Cortex-A L2 Cache without external memory

I'm thinking about using a cortex-a7 in "bare-metal" where I don't need much memory, so i'd like to avoid using external memory. The CPU boots from an external 4MBytes SPI NOR FLASH chip. It has 512 KBytes...
Cache cleaning and invalidating in ARM Cortex-A

Cleaning or invalidating the L1 cache and L2 cache will not be a single atomic operation. A core might therefore perform cache maintenance on a particular address in both L1 and L2 caches only as two...
Cache cleaning and invalidating in ARM Cortex-A

Cleaning or invalidating the L1 cache and L2 cache will not be a single atomic operation. A core might therefore perform cache maintenance on a particular address in both L1 and L2 caches only as two...
Clean and Invalidate Cache Memory

Hi experts, Wat is the key difference between clean and invalidate the cache memory ? How it is related to eviction of data into the external memory ? What happens if any one of the operations alone carried...