Are simultaneous accesses to both ITCM and DTCM of Cortex-M7 possible?

Hi experts and ARM designers, I have found "ARM® Cortex®-M7 Processor Technical Reference Manual Revision r0p2" on the ARM site. By reading it I have a question. "Figure 1-3 Cortex-M7 functional diagram...
Are simultaneous accesses to both ITCM and DTCM of Cortex-M7 possible?

Hi experts and ARM designers, I have found "ARM® Cortex®-M7 Processor Technical Reference Manual Revision r0p2" on the ARM site. By reading it I have a question. "Figure 1-3 Cortex-M7 functional diagram...
What happens if ITCM and DTCM overlap on ARM926EJ-S?

Note: This was originally posted on 23rd January 2012 at http://forums.arm.com Hello, I noticed a bug in ITCM and DTCM initialization in some bootloader code. The result is that the same value is written...
What happens if ITCM and DTCM overlap on ARM926EJ-S?

Note: This was originally posted on 23rd January 2012 at http://forums.arm.com Hello, I noticed a bug in ITCM and DTCM initialization in some bootloader code. The result is that the same value is written...
global variable space, IRAM

Every so often I chase memory overflows (IRAM or variable space) and I never remember where the settings are that need to be changed. I added a global structure array that caused my code not to even...