Why does Cortex-R only support most two cores?

Why does Cortex-R only support most two cores?
Application note on R4 and R5 differences

Hi Experts, Is there any application note on the Cortex R4 to R5 differences and what are all the special features R5 possess ?
Cortex R4 versus ARM9E

I have ARM9E very well optimized code. If I run the same piece of code, how much of optimization/performance improvement can be seen on Cortex R4? Does anybody has benchmarking results between ARM9E and...
Cortex-R4: Need a explanation for dual-issue restriction

Hello, The following table is extracted from the Cortex-R4 whitepaper: Could someone help me to explain that question: My concern is that Cortex-R4 can take MOV as first instruction, ADD as second instruction...
Very Urgent :VIC in ARM Cortex R4

Hi all, It was nice experience working with NXP with my favorite S32K1XX series having ARM Cotex M-4 and M-0+. Now i switched to BCM895XX series with ARM Cotex R-4 having VIC for interrupt contolling...