Virtual Timers in ARM V8

Hi Experts, How the virtual timers work in the ARM V8 ? Key usage of physical and virtual timers in ARM V8 ?
Trap to hypervisor if the guest OS access a specific region of memory.

Hi, Is there a way (e.g. through configuring a specific hyp register) to cause the guest OS to trap to the hypervisor in case the guest OS tries to access a specific region of memory say from address...
Exceptions levels in the ARMv8 architecture

Hello There are four exceptions levels in the ARMv8 architecture. EL0 EL1 EL2 EL3 Can anyone explain more of the EL3 execption level? What does it mean by 'allows swtiching between secure and nonsecure...
Compability between architecture ARMv5TE and ARMv7-A

Hello everyone! I have a question about the compability between architecture ARMv5TE and ARMv7-A. We want to change our Platform-Processor from ARM 946E-S to an ARM Cortex A9. The Problem is, that our...
why there are 4 cores per cluster in ARMV8 architecture

Hi experts, I want to knows why there are 4 core cores per cluster in ARM big.Littte architecture? Is it possiable if we make more cores per cluster? if not, what is the limitation?