• Is AXI4 Ordered write observation used to support PCIE Producer/Consumer ordering model?
    AXI4 spec " Ordered write observation " says it " can support the Producer/Consumer ordering model with improved performance ". AXI4 spec does not mention PCIE spec, but we know PCIE spec uses Producer...
  • Is there a limit for AXI4 outstanding transaction?
    Hi all! I'm working on an avalon to axi4 master writing bridge module. In many cases,I need to assert a large number of awvalid continually for writing efficiency(for instance, a frame of 4K video data...
  • AXI4 ordering
    AXI4 document says that when a master issues multiple transactions to same / overlapping address with same ID, the order of arrival at the slave must be the same as the order of issue. I think it means...
  • AXI4
    In the spec it is mentioned that AXI4 supports high-bandwidth, high-frequency and low-latency operation. How to justify this? What is the meaning of bandwidth in this context? What are the values of bandwidth...
  • ARM AMBA AXI4 read channel information
    Hello, If AXI4 master issue read transfer by asserting the ARADDR = 0x0002, of ARSIZE = 0, ARLEN = 0, on which byte lane of RDATA slave drive the read data byte? Guide me with sort and simple answer...