Core Pattern Conversion for SoC Test: Beware of the 'Poison Perl'

Bringing test patterns for your ARM core or other core-level blocks together for chip-level test of your SoC can present significant challenges. Whether your core-level test patterns are scan-based or...
AHB Lite Multiple burst without idle transfer

Hi All, Consider the following burst transfers. 1. INCR4 (WR) IDLE INCR4(RD) 2. INCR4 (WR) INCR4(RD) 3. INCR4 (WR - WR1 ,WR2, IDLE, WR3 ,WR4 ) INCR4(RD) All the above transactions are valid...
Cortex A9 dual core - How to achieve an AMP system without an RTOS?

One of my customer is considering to use Cortex A9 dual core device for a computational intensive task (For the sake of discussion, lets assume an high end image analysis task). Due to cost or other over...
Fast model : Is there any way to overwrite PVBUS master id without using components which have id parameter (e.g. master_id, cluster_id )

Hello, I want to make a simple module, so called CPU_SEL. It is a kind of bridge that it just overwrites master id according to its register value to set banked GICC registers of GIC_400. However...