• AXI protocol - Unaligned data transfer definition
    IN axi,what is unaligned data transfer??
  • Aligned and unaligned word transfers on a 64-bit bus
    address = 0x07 transfer size = 32 bit burst type = INC Burst length = 4 transfers Can you please explain this example of unaligned word transfer on 64-bit bus. Why the second transfer started...
  • AXI4 master requirements for unaligned transactions (address v/s WSTRB)
    Hi all, I am a bit confused by the phrasing of the specification regarding unaligned transfers, here's how it goes: A master can: - use the low-order address lines to signal an unaligned start address...
  • AXI4
    AXI4 specification says that AXI is a point to point interface. Can you explain this statement meaning and it's significance?
  • AXI4
    In the spec it is mentioned that AXI4 supports high-bandwidth, high-frequency and low-latency operation. How to justify this? What is the meaning of bandwidth in this context? What are the values of bandwidth...