AHB WRAP address boundaries

Note: This was originally posted on 18th June 2008 at http://forums.arm.com AMBA spec (v2.0) only shows how the addresses wrap when hsize = 2 (word). Is it because the address boundary remains the same...
the usage of WSTRB signal

Note: This was originally posted on 26th February 2009 at http://forums.arm.com Hi All, I was going through the AMBA AXI specs, but I have some questions about the usage of the WSTRB signal. In the middle...
Burst Length of wrap type in AXI4

As per spec, the burst length of wrap type should be 2,4,8 or 16. But at the same time it is also mentioned that burst length= AxLEN[7:0] +1, to accommodate the extended burst length of the INCR burst...
Regarding WRAP burst calculation in AXI4

Could you please help me on this topics in AXI4 protocal :: 1. what is meant by Aligned and Unaligned address? 2.How can I calculate WRAP boundary calculation in AXI4? please explain with example...
AHB HREADY low not after address phase

What would happen if HREADY will be lower not after address phase, but according to HW internal logic that wants to hold CPU for some clock cycles. Thanks