AHB response relation with data

Note: This was originally posted on 30th September 2008 at http://forums.arm.com Hi, I have an issue regarding AHB responses relation with data in case of AHB write transfers . As we know that the address...
AMBA AHB HSPLITx signal.....

Note: This was originally posted on 30th September 2008 at http://forums.arm.com Hi guys... I am trouble again..... My question is : If slave 0 gives split error to two masters say master 0 and master...
quiery about AHB burst mode

Note: This was originally posted on 19th November 2008 at http://forums.arm.com hi, in the AHB burst mode is it the Master that drives consecutive address to slave, or is it that the master only sends...
AXI Cacheable vs. Bufferable

Note: This was originally posted on 19th November 2007 at http://forums.arm.com If an AXI slave acting as a bridge has accepted a bufferable (ACACHE[0]) and cacheable (ACACHE[1]) write and responded with...
AHB frequency

Note: This was originally posted on 6th January 2009 at http://forums.arm.com Hi Friends, My doubt is : what is the maximum AHB clock frequency ? Regards, P.Vignesh Prabhu