• AXI Read/Write ordering
    Note: This was originally posted on 24th October 2007 at http://forums.arm.com Hello,    Section 8.6 of the AXI spec says that reads and writes have no ordering restrictions between them.  It then says...
  • Write Data Interleaving - AXI
    Note: This was originally posted on 19th March 2009 at http://forums.arm.com Hello, Can anybody help me to understand the reasoning behind write data interleaving ordering restriction imposed by AXI spec...
  • AXI write strobes
    Note: This was originally posted on 21st February 2007 at http://forums.arm.com the AXI spec says: 10.1 About unaligned transfers [...] For any burst that is made up of data transfers wider than one byte...
  • AMBA AXI Write response
    I am just going through the specs of AMBA AXI. I've few questions.It will be great if anybody clarify 1) Why there was no Write response for each beat in burst Write. But there is a seperate Read response...
  • AXI protocol
    Note: This was originally posted on 30th December 2007 at http://forums.arm.com Can anyone tell me the exact explanation and differnce between out of order completion and write data interleaving  in detail...