unaligned address in AXI protocol

i am sending data "NEWDATAA" which is 8 bytes. and starting address is 5, which is unaligned address then whether my data is loss or not . please explain how the whole transfer will happens. how the strobe...
AXI protocol - Unaligned data transfer definition

IN axi,what is unaligned data transfer??
AXI fixed burst to a slave with narrow data width

Hi, I have an AXI master with data width 64, and an AHB slave of data width 32. What would happen when there is a 64bit FIXED burst READ (i.e., asize=3 )to an address 0X100 of the slave? Would the...
[AXI protocol] Is a master allowed to disable byte lanes in a non-narrow WRAP burst?

Hello, A couple of further details on the question. Let's assume that I have a 64-bit data bus and a 32-bit address bus. A master issues a WRAP burst with AWADDR[31:0] = 32'd8 and AWSIZE[2:0]...
AXI Read/Write ordering

Note: This was originally posted on 24th October 2007 at http://forums.arm.com Hello, Section 8.6 of the AXI spec says that reads and writes have no ordering restrictions between them. It then says...