AXI fixed burst to a slave with narrow data width

Hi, I have an AXI master with data width 64, and an AHB slave of data width 32. What would happen when there is a 64bit FIXED burst READ (i.e., asize=3 )to an address 0X100 of the slave? Would the...
AXI narrow read with unaligned address

Hi, I have a question about the correct behavior when performing a narrow read with an unaligned address; consider the following scenario: - 32 bit data bus - address x0001 - length 0 (1 beat...
burst-based transactions on AXI

Hi, I'm confusing with burst transaction in AXI. there is one key feature in AXI spec.... > "burst-based transactions with only start address issued" How can we understand this point? ...
AXI Wrap burst address calculation, start_addr=0x96h, burst_size=8transfers each of 4 bytes wide

Hello, I am unable to understand , which start address should i take in case of wrapping burst address calculation of AXI? For example , my Burst size=4 transfers(beats) each beat(transfer)size...
When Wrapping happens in AXI?

Hi Forum, I cannot understand when address is being wrapped in WRAP burst. In my example, the WRAP condition never happens in other words, during BURST operation address always remains small than...