Error scenario in AHB protocol

Hi, I am developing a RTL code for AHB lite - AXI bridge. I want to understand what are the possible error scenarios in AHB? 1.I can think of invalid address as the only case. Is there any other scenario...
AHB slave

1.) In AHB, When early burst termination is occurred, HRESP should be OKAY and HREADY should be high? 2.) Is there any possibilities that if write transaction is in progress and if burst is not completed...
Ahb

why okay response is single cycle?but error,split,retry is two cycle.why?
State Machine for AHB-Lite Protocol

This is more of a conceptual doubt than a doubt in protocol. I've come across many papers where state machines are designed for AHB and AHB-Lite. I never understood why a state machine is required and...
AHB

Hello, 1.) Is it possible in real system that Master will send start address 0x01 ? If Master wants to write only one byte at address 'h1, other addresses what ever value it has then how Master will give...