AHB master continues transfer after error response

Hi Everyone, Consider an AHB transaction in which the AHB slave signals an error response, and the AHB master decides to continue the transfer with the present slave. Following are three waveforms that...
Ahb

why okay response is single cycle?but error,split,retry is two cycle.why?
Burst termination with BUSY transfer on AHB

I heard that when HTRANS is BUSY, undefined length burst (INCR) will be terminated. But when I read a document, I saw an example that BUSY transfer followed by SEQ transfer during an undefined length...
AMBA AHB

1)what are the different generations in AMBA AHB?
AHB amba 5 lite - waited write transfer

Hello, i didnt find at spec any note about the waited write transfer. for example T1 : NONSEQ + write transfer + HREADY is high T2: HREADY dropped + HTRANS is idle - HWDATA ? does the HWDATA...