How to access the memory mapped debug registers?

Now that the funny PABT-behaviour is found to be (probably) caused ny debug state, I'd like to exit debug state before return from PABT exception. The ARM v7-A/R ARM says that I should write RRQ to DBGDRCR...
Weird SPSR behaviour

I was trying to write a register context saving/restoring when I came across a weird behaviour. My code (sorry, tried to format tens of times, but the editor WANTS to make asm a table): asm volatile ...
Basic register write data changes in assembly when NOP added

Hi all, I am doing a basic register read/write on a custom SoC with ARM Cortex A53 and many other peripherals added with an AXI fabric integrated. Using the below code in assembly after bringing up...
Cortex-A7 instruction lists

Just in case someone needs them, I made ARM and Thumb mode lists of Cortex-A7 instructions (because I didn't find them in the net). They are generated from ARMv7-A/R ARM with a simple AWK-script and then...
How can I tell which breakpoint/watchpoint triggered (Cortex-A7)

In a Cortex-A7 is there a register that shows which breakpoint or watchpoint has triggered a debug event? Or what's the usual way to find out? I understand that DFSR FS tells if the DABT took place due...