GICv3&4: Direct Injection of Virtual Interrupts

Can anyone make me clear about direct injection of virtual interrupts. It is said in GICv4 that it supports direct injection of virtual interrupts, 1. What is the advantage of direct injection of virtual...
GICv3 -- accessing the redistributors of other cores

In GICv2, per-core interrupts (SGIs and PPIs) are configured through banked registers in the distributor, which means that a core cannot access the configuration of the SGIs and PPIs of the other cores...
why the inter-core SGI interrupt cannot be trigged on GICv3 hardware

My hareware environment: 1. a ARMv8 processor , which runs in 64bit EL3 and 32bit EL2&EL1. 2. a GICv3 interrupt controller Running in 32bit hyp mode, I try to send a SGI interrupt from core0 to core1...
GICv3&4 : What is the purpose of Direct Injection of Virtual Interrupts.?

Hi Everyone, Its true that Hypervisor inserts interrupt in the virtual machine. But, GICv4 also tells that it supports direct injection of virtual interrupts which means that, interrupt can be inserted...
GICv3 specification

Is there any GIC architecture version 3.0 specification available ? I could not find it online. Thanks