Arm cortex M3(LPC1769) MPU settings

Hello everyone, I am trying to set up the MPU in my LPC1769 Xpresso board. The memory map of LPC1769 is as given below: 512kB FLASH @ 0x0000 0000 – 0x0007 FFFF 32kB on-chip SRAM @ 0x1000 0000 – 0x1000...
error: Hard Fault Handler

HI,currently i am working on project based on stm32f407 chip.my development work has been stopped since two days as i have stuck in hard fault handler. Please guide me how to trace the fault ???i tried...
Debugging a Cortex-M0 Hard Fault

There's many references to Debugging a Hard Fault on Cortex-M3 & M4; eg niallcooling 's Developing a Generic Hard Fault handler for Armv7-M also: http://supp.iar.com/Support/?Note=23721 https...
When Wrapping happens in AXI?

Hi Forum, I cannot understand when address is being wrapped in WRAP burst. In my example, the WRAP condition never happens in other words, during BURST operation address always remains small than...
How to configure Cortex M3 endianness?

I found two statements in cortex m3 guide(red book) 1. Cortex m3 supports both Little as well as big endianness. 2. After reset endianness cannot be changed dynamically. So indirectly it is telling...