To generate a FIQ from ARM GIC apart from setting GICC_CTLR.FIQEn what else needs to be configured?

I'm just trying to generate an FIQ from GIC .All the interrupts are by default grouped to Group0 and apart from setting FIQEn trying to understand what else needs to be configured..
The non-secure copy of the GICC_CTLR gives FIQEn bit as reserved. How to configure GIC to generate FIQ in this case?

In the the arm gic arch specification (version 2) section 3.9.2, it has been given that for any implementation of GICv2 (with or without Security Extn) we can configure the GIC to generate FIQ for...
How to configure Interrupt vector table ?

Hi, I am using I.MX6Q Sabre sd board (cortex-a9 ). I am trying to build custom image with my own start script and ld script. The image is to be loaded with u-boot. Where should i place the Interrupt vector...
Embedded ARMv8 dev board

I'm an arduino guy looking for more power and I'd like to start using the high performance ARM chips such as the A57 and soon the A75, but I'm having an impossible time finding dev boards for anything...
ARMv8 Exception level on Startup

Hi, When i power on a ARM cortex A57, How many of the 4 Exception levels will be supported? How can i set such that only exception levels EL0 and EL1 are supported in my program? How can i activate...