Store operations where the cache line is already cached (ACE protocol)

In Section C1.3 Channel Overview of the AMBA_AXI_and_ACE protocol specifications, It is mentioned under " Store operations where the cache line is already cache d" as : The initiating master component...
Write Data Interleaving - AXI

Note: This was originally posted on 19th March 2009 at http://forums.arm.com Hello, Can anybody help me to understand the reasoning behind write data interleaving ordering restriction imposed by AXI spec...
AXI4 - read data interleaving

Hi Folks, We need a clarification on Read Data Interleaving on AXI4 Read Data Interleaving is supported in AXI4 and following is my understanding on Data Interleaving: Multiple Read commands can be executed...
AXI WRITE DATA CHANNEL

Hi All, I am doing single write operation to AXI slave from avalon BFM. The data and address signals are reached into the axi slave.But if i am try to read back the data which i have written in the...
How to handle Cache flush in ACE?

Hi, I want to know which transaction should be issued by ACE interface on the channel when a flush/clean request is being processed by the cache? Can anyone please help. Regards, Taniya...