Could you explain the uDMA burst request in Cortex M4F to me?

Hi, When I read the following on Cortex M4F, I don't understand the blue phrase on the uDMA process. 1. Why does it selects the lesser? The arbitration size matters uDMA services here? 2. I remember that...
Building position independent binary

Hi, I've created a custom firmware update process on a TI TM4c1294NCPDT (Arm Cortex-m4f) and have divided the flash into 2 partitions. I'd like to be able to build one image that will work in either...
How to remove group delay for CMSIS DSP FIR low pass filter function?

Hello All, I'am using TI MCU TM4C129x and code composer IDE. I've integrated the CMSIS DSP library inside my code and I'am able to apply the low pass filter using arm_fir_f32() function. My input...
AXI3 locked access

I want to know what happens in these scenarios : 1) Assume Master1 (M1) is doing locked access, if locked access fails before M1 does unlocking transaction what is the response to the M1? 2) Assume M1...
Lock Signal for AXI Slave

According to what I read in AXi spec sheet, AxLOCK signals are used by the Masters for a locked access to a slave and it's the arbiter/interconnect which takes care of the AxLOCK signal. Am I right when...