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  • Cortex-M4 setup vector table for external interrupts
    I don't want to setup the vector table for all my external interrupts. For instance I only need the timer4 IRQhandler at IRQn 30. How can I make an offset in the table? Is this necessary?
  • To generate a FIQ from ARM GIC apart from setting GICC_CTLR.FIQEn what else needs to be configured?
    I'm just trying to generate an FIQ from GIC .All the interrupts are by default grouped to Group0 and apart from setting FIQEn trying to understand what else needs to be configured..
  • remapping the interrupt vector table to alternate locations in the memory map
    dear All, in nxp lpc 1768 i read "remapping the interrupt vector table to alternate locations in the memory map". for which reason one should to remap the interrupt vector table? regards, Ras
  • Other core's view after writing ICC_SGI1R_EL1 to trigger SGI
    For example, the codes are executed in core0. codes: (1) send SGI to core1 ICC_SGI1R_EL1 (2) set(a) = 1 i) Then the core1 will first see the irq or the change of variable a? ii) If I add ISB...