GIC v3&4: Programming sequence of GIC Registers

Hi., Is there any sequence in programming GIC Registers. Physical Interrupts point of view, I have followed sequence as follows: GICD GICR GICC/ICC Coming to Virtual Interrupts point of view, I had small...
GIC-400 non-secure access

Hi, experts I'm the new one porting armv8 linux. I have some problem about gic400 access. In the porting linux progress,CPU will switch to EL1NS. In gic_dist_init() function, I read the the GICD_ISENABLERn...
GIC-v3&4: Regarding the Acknowledge Register

Hi all, I need some clarification related to acknowledge register in GICv3&4 document. ----------------------------------------------------------------------------------------------------------------...
GICv3&4: Direct Injection of Virtual Interrupts

Can anyone make me clear about direct injection of virtual interrupts. It is said in GICv4 that it supports direct injection of virtual interrupts, 1. What is the advantage of direct injection of virtual...
GICv3&4 : What is the purpose of Direct Injection of Virtual Interrupts.?

Hi Everyone, Its true that Hypervisor inserts interrupt in the virtual machine. But, GICv4 also tells that it supports direct injection of virtual interrupts which means that, interrupt can be inserted...