Branch Predictor detailed info

Hi all, Is there any document related to the branch predictor algorithm utilized in the ARMV7 and ARMV8 and how the software (ABI) can be aptly developed ac-complying the same ?
MMU and Cache configuration

Hello there, I want to enable MMU and Cache to improve the performance of my arm cortex-A5 core. I have gone through the Reference manual of arm cortex a5 and found the below step to enable mmu and...
Trouble configuring MMU for 2MB block mapping

So I'm working with QEMU and AArch64 mode and using the MMU. I've succesfully mapped 4K blocks, but I'm having trouble mapping 2M blocks. My configuration is such that the L1 entries are 1GB blocks, L2...
Different between AF vs AP (MMU Setup)

What is different between AF & AP? I understand AP = permission access as read/write/readonly/no access but what is AF?
Cache maintenance and DMA

Greetings ARM community, I have been tasked with cache maintenance. The necessity popped up because of DMA issues on USB. As a quick (not perm solution) I used the invalidate all routine. While obviously...