• Why use Cortex-M7 dual-redundant core?
    Cortex-M7 has an parameter named "LOCKSTEP" which specifies whether the implementation is a dual-redundant core and uses lock-step. My question is: why do I need to implement the dual-redundant core...
  • Cortex M7 SPI Interface Register Base Address
    Hello, I am trying to use the SPI interface on the Teensy 4.0 board which has a Cortex M7. I found the registers and there offsets in the RM0444 Reference Manual but can't find the Base Address of...
  • AHB5 did'nt mention SPLIT and RETRY responses
    While going through the AHB5 specifications, I did'nt find RETY and SPLIT responses anywhere. Did ARM remove these responses?
  • Memory map for ARMv8-M TrustZone SOC's
    Hello, I was wondering what the memory map of an SOC that includes a ARMv8-M TrustZone enabled system would like. Is it fixed or is it variable ? Based on the ARMv8-M ARM, it appears that things like...
  • Why Cortex-M7 doesn't support bit-banding?
    Cortex-M7 processors tends to be for the high performance applications. So why it doesn't support bit-banding if this has a lot of advantages to the code size and performance?